Quantum computing continues to advance at a rapid pace, but one challenge that holds the field back is mitigating the noise that plagues quantum machines. This leads to much higher error rates compared to classical computers. This noise is often caused by imperfect control signals, interference from the environment, and unwanted interactions between qubits, which are the building blocks of a quantum computer. Performing computations on a quantum computer involves a “quantum circuit,” which is a series of operations called quantum gates. These quantum gates, which are mapped to the individual qubits, change the quantum states of certain qubits, which then perform the calculations to solve a problem. But quantum gates introduce noise, which can hamper a quantum machine’s performance.
Researchers at MIT and elsewhere are working to overcome this problem by developing a technique that makes the quantum circuit itself resilient to noise. (Specifically, these are “parameterized” quantum circuits that contain adjustable quantum gates.) The team created a framework that can identify the most robust quantum circuit for a particular computing task and generate a mapping pattern that is tailored to the qubits of a targeted quantum device. Their framework, called QuantumNAS (noise adaptive search), is much less computationally intensive than other search methods and can identify quantum circuits that improve the accuracy of machine learning and quantum chemistry tasks. When the researchers used their technique to identify quantum circuits for real quantum devices, their circuits outperformed those generated using other methods.
“The key idea here is that, without this technique, we have to sample each individual quantum circuit architecture and mapping scenario in the design space, train them, evaluate them, and if it is not good we have to throw it away and start over. But using this method, we can obtain many different circuits and mapping strategies at once with no need for many times of training,” says Song Han, an associate professor in the Department of Electrical Engineering and Computer Science (EECS) and senior author of the paper. Joining Han on the paper are lead author Hanrui Wang and Yujun Lin, both EECS graduate students; Yongshan Ding, an assistant professor of computer science at Yale University; David Z. Pan, the Silicon Laboratories Endowed Chair in Electrical Engineering at the University of Texas at Austin, and UT Austin grad student Jiaqi Gu; Fred Chong, the Seymour Goodman Professor in the Department of Computer Science at the University of Chicago; and Zirui Li, an undergraduate student at the Shanghai Jiao Tong University. The research will be presented at the IEEE International Symposium on High-Performance Computer Architecture.
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